1. Field of the Invention
This invention relates to a bus-driving system employed in a semiconductor integrated circuit, and in particular to a device contributing to saving power required in a bus-driving circuit.
2. Description of the Related Art
There are two bus-driving systems--a dynamic system and a static system.
FIG. 1 shows a dynamic semiconductor integrated circuit.
A transistor P1 is turned on when a clock signal CLK becomes "H (high)" level, thereby precharging a bus BUS to "H" level. Further, when the clock signal CLK is at "H" level, transistors N51-N5n are in the off-state, and an input circuit IN is in the cut-off state.
The transistor P1 is turned off when the clock signal CLK becomes "L (low)" level. At this time, the bus BUS is in a floating state, with the "H" level maintained. Further, when the clock signal CLK is at "L" level, each of the transistors N51-N5n is in the on-or off-state in accordance with a signal supplied from corresponding one of control circuits C51-C5n.
When the clock signal CLK is at "L" level, and all the transistors N51-N5N are in the off-state, the bus BUS keeps at "H" level. When the clock signal CLK is at "L" level, and at least one of the transistors N51-N5N is in the on-state, the bus BUS is at "L" level.
In the above-described dynamic system, the bus BUS is precharged to "H" level a number of times corresponding to the number of cycles of the clock signal CLK. Thus, when, for example, 0-data is transferred from a ROM, a RAM or a CPU to the bus BUS, the wiring of the bus BUS and all the loads connected to the bus BUS are repeatedly charged and discharged, with the result that the circuit consumes a large amount of power.
The power consumption has been more and more increased in accordance with an increase in the number of buses or in the length of wiring. Moreover, the higher the frequency of the clock signal CLK, the larger the power consumption of a semiconductor integrated circuit.
When the clock signal CLK is at "L" level, the input circuit IN can operate. Accordingly, the data in the bus BUS is transferred to the ROM, the RAM or an I/O in accordance with an instruction from a control circuit Ck.
FIG. 2 shows a static semiconductor integrated circuit.
The bus BUS is kept at "H" level by means of p-channel MOSFETs P61-P6n, and at "L" level by means of n-channel MOSFETs N61-N6n. The p-channel MOSFETs P61-P6n and the n-channel MOSFETs N61-N6n are controlled by control circuits C61-C6n.
This static system requires p-channel MOSFETs, whose number is larger by one than the first-mentioned dynamic system. This makes the static system have a more complicated control circuit than the dynamic system, and increases the required area of the driving circuit for outputting data to the bus BUS.